Joseph A. "Josh" Fisher was born on July 22, 1946. He is an American and Spanish computer scientist known for his work on VLIW architectures, compiling computer code, and instruction-level parallelism. He also founded the company Multiflow Computer. He holds the title of Hewlett-Packard Senior Fellow, Emeritus.

Biography

Fisher earned a BA in mathematics (with honors) from New York University in 1968. He later earned a Master's and PhD in Computer Science from The Courant Institute of Mathematics at New York University in 1979.

In 1979, Fisher began working as an assistant professor in the Yale University Department of Computer Science. He became an associate professor in 1983. In 1984, Fisher left Yale to help start Multiflow Computer with colleagues from Yale, John O'Donnell and John Ruttenberg. After Multiflow closed in 1990, Fisher joined HP Labs. He led HP Labs in Cambridge, MA, USA, when it was founded in 1994. Fisher became an HP Fellow in 2000 and a Senior Fellow in 2002 when those titles were created at Hewlett-Packard. He retired from HP Labs in 2006.

Fisher married Elizabeth Fisher in 1967. They have a son, David Fisher, and a daughter, Dora Fisher. He has Spanish citizenship because of his Sephardic heritage.

Work

In his doctoral research, Fisher developed the Trace Scheduling compiler algorithm and introduced the term "Instruction-level parallelism" to describe how certain computer designs, such as VLIW, superscalar, and dataflow systems, allow simple instructions to work together in parallel. Trace scheduling was the first practical method to identify large amounts of parallelism between instructions located in different parts of a program. This advancement significantly improved the speed of computers that use instruction-level parallelism.

Applying trace scheduling to unusual systems, like 1970s digital signal processors, proved difficult. These systems were expected to work well with trace scheduling, but challenges arose. To address this, Fisher proposed the VLIW architectural style. VLIW computers function like regular computers but are designed to handle many instructions at the same time, using compilers like trace scheduling to organize tasks. VLIW technology is now widely used, especially in embedded systems, with some designs selling billions of processors.

Multiflow was created to bring trace scheduling and VLIW technology into practical use. At the time, these methods were considered too complex for real-world applications. However, Multiflow's success in developing and sharing this technology had a major influence on the future of computer science and the computer industry.

Awards and honors

• 1984 NSF Presidential Young Investigator's Award. (This award aimed to encourage talented faculty to remain at universities; a financial grant to Yale University was not accepted because Fisher left to start Multiflow.)
• 1987 Eli Whitney Connecticut Entrepreneur of the Year.
• 2003 Eckert–Mauchly Award given by The IEEE Computer Society and The Association for Computing Machinery, for important contributions to instruction-level parallelism, early work on VLIW architectures, and the creation of the Trace Scheduling compilation technique. The Eckert–Mauchly Award is considered the most important award in the computer architecture field.
• 2012 B. Ramakrishna Rau Award given by The IEEE Computer Society for developing trace scheduling compilation and early work on VLIW (Very Long Instruction Word) architectures.

Writings

• Joseph A. Fisher, Paolo Farabochi, and Cliff Young: Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools. Elsevier/Morgan Kaufmann, 2004.
• Joseph A. Fisher: Trace Scheduling: A Technique for Global Microcode Compaction. IEEE Trans. Computers, 30(7):478-490, 1981.
• Joseph A. Fisher: Very Long Instruction Word Architectures and the ELI-512. ISCA '83 Proceedings of the 10th Annual International Symposium on Computer Architecture, Pages 140–150, ACM, New York, NY, USA. Retrospective: 25 Years of ISCA, ACM, 1998.
• Joseph A. Fisher, John R. Ellis, John C. Ruttenberg, and Alexandru Nicolau: Parallel Processing: A Smart Compiler and a Dumb Machine. Symp. Compiler Construction, 1984: 37–47. Retrospective: Best of PLDI, ACM SIGPLAN Notices, 39(4):112, 2003.
• B. Ramakrishna Rau and Joseph A. Fisher: Instruction-Level Parallel Processing: History, Overview, and Perspective. The Journal of Supercomputing – Special Issue on Instruction-Level Parallelism, Volume 7, Issue 1–2, May 1993. Also published by Kluwer Academic Publishers, Hingham, MA, USA.